A conventional semiconductor package includes a semiconductor chip and a resin layer covering the semiconductor chip. In one example of such semiconductor package, an active surface (i.e., a circuit formation surface) and side surfaces of a semiconductor chip are covered by an insulating layer and a wiring structure electrically connected to the semiconductor chip is stacked on the insulating layer (refer to, for example, Japanese Laid-open Patent Publication No. 2008-300854).
A conventional method of manufacturing a semiconductor package is such that a supporting substrate is prepared and a semiconductor chip is mounted on the supporting substrate in such a manner that a surface of the semiconductor chip on an opposite side of an active surface thereof is placed in contact with a surface of the supporting substrate. Subsequently, the semiconductor chip thus mounted is sealed by an insulating layer and a wiring structure is formed on the insulating layer by laminating wiring layers and interlayer insulating layers. A finished semiconductor package is obtained by finally removing the supporting substrate.